`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date:    11:28:26 04/20/2011 
// Design Name: 
// Module Name:    delay_buffer_16bit 
// Project Name: 
// Target Devices: 
// Tool versions: 
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module delay_buffer_16bit(a, y);
    input [15:0] a;
    output [15:0] y;
  
	reg [15:0] y;

	
	always @ (a)
		#2 y <= a;
		
endmodule
